Custom Simulated 8-Bit Computer
This is my oldest documented project, and one that I am still very proud of. Back in high school, I was introduced to a video game called Minecraft, the game is intended as a sandbox with many different mechanics, with the ability to build, mine, hunt, fight etc.
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I began to take interest in one of the mechanics called redstone and quickly realized that you could construct digital logic using it. I found a following of people that were making more complicated systems like binary adders, d-flipflops and even full blown programable computers. I became interested, and having been never taught about computer architecture, dove in and started to try and figure it all out.
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I started reverse engineering many other peoples creations and discovered that the computers in the video game operated on exactly the same principles as those in real life. I downloaded a few textbooks on processor architecture and started reading. Before long I understood enough to think of how I would design my own computer. I also noticed that there were many inefficiencies in some of the fastest documented Minecraft computers that I could easily improve on.
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To help understand this, a small amount of background on the video game is useful. Redstone could be used to run wires where each wire had an on and off state, wires could be attached together through an inverter (NOT gate) and could be connected together to produce OR gates. Each junction induced a 0.1 second delay that the video game used to keep lag in the game down, further, for every 15 block units of travel, a "repeater" had to be placed adding 0.1 seconds each time. This meant that delay due to sheer size and length of data transfer was a huge problem inducing mass amounts of delay.
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What I noticed in other peoples designs were three main inefficiencies. Firstly, most people did not use the most efficient designs on components like the ALU and RAM. Not only was I able to make significant "game specific improvements", but I also started experimenting with more efficient binary adders like carry look-ahed adders which showed significant speed improvements. Next, I noticed that most people did not physically lay out their designs in the most efficient ways. I was able to gain significant speed improvements simply by locating components in better ways.
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The last improvement was by far the most important however. The act of simply transmitting data was clearly the limiting factor for my design. What I discovered was that if I designed an instruction set that performed more simultaneous functions in one clock cycle, I could significantly reduce the overall time to run a program while only slightly increasing the clock period. Major improvements were things like dual read RAM where I could do things like access and write two different RAM addresses to the ALU register in one instruction.
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In the end, my computer was the fastest that anyone in the community had ever seen and remained the fastest for over 3 years until a 3 stage pipelined dual core design could execute similar programs faster. To demonstrate its abilities, I programmed the computer to run the bresenham line algorithm and display its results. For a quick overview about the computer, its specs and the demo, watch the video above.
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