How it started
In high school I got into Minecraft and its “redstone” mechanic, and realized you could build digital logic with it. A community was building binary adders, flip-flops and even whole programmable computers. I’d never been taught computer architecture, so I reverse-engineered other people’s builds, downloaded textbooks on processor design, and worked it out.
The constraint
Redstone wires are on or off; an inverter gives you NOT, and joining wires gives you OR. Every junction adds 0.1 seconds of delay (the game’s way of keeping lag down), and every 15 blocks of wire needs a repeater that adds another 0.1 seconds. Simply moving data around was the dominant cost.
What I improved
- Most builds didn’t use the most efficient component designs. I made game-specific improvements to the ALU and RAM, and used faster adders such as carry look-ahead.
- Most builds weren’t laid out efficiently. Placing components better alone gave significant speed-ups.
- Most importantly, since data transfer was the bottleneck, I designed an instruction set that did more in each clock cycle (for example dual-read RAM, which reads two addresses into the ALU registers in one instruction) at the cost of only a slightly longer clock.
Where the speed came from
- Faster componentsCarry look-ahead adders; game-specific ALU and RAM designs
- Better layoutComponents placed to shorten slow signal runs
- Wider instructionsMore work per clock, e.g. dual-read RAM
- ResultFastest in the community for 3+ years
Result
It was the fastest computer the community had seen, and stayed that way for over three years, until a three-stage pipelined dual-core design beat it. As a demo, I programmed it to run Bresenham’s line algorithm and display the result. The video at the top walks through the computer, its specs and the demo.
